In a semiconductor integrated circuit, the reliability of the entire system is improved by stably maintaining the internal biasing reference voltage. That is, even if an external power supply voltage, temperature, or a process is changed, the devices in the integrated circuit should function without being affected by the change in the external power supply voltage, temperature, or process. For this purpose, reference voltage generating circuits which are designed to supply a stable and constant reference voltage are provided. However, these reference voltage generating circuits may be made unstable due to a change in temperature, process conditions, and an external supply voltage.
Among the reference voltage generating circuits, a bandgap reference voltage generating circuit is a circuit which outputs a constant voltage regardless of a change in temperature, supply voltage, or process. Such a reference voltage generating circuit adds a voltage proportional to an absolute temperature generated by a PTAT (Proportional To Absolute Temperature) circuit and a voltage at a base-emitter junction having a negative temperature coefficient, thereby outputting a stable reference voltage, regardless of the change in temperature.
This related reference voltage generating circuit outputs a stable reference voltage when two input transistors in an operational amplifier are implemented to have the same size. The related bandgap reference voltage generating circuit includes a temperature compensating circuit having a bipolar transistor and a resistor, an operational amplifier OP AMP that stably outputs a bias reference current, a feedback circuit, and a start-up circuit that enables the start-up of the entire circuit when a voltage is supplied and when a sleep mode is switched over to an operation mode.
In detail, as shown in FIG. 1, the related bandgap reference voltage generating circuit includes an operational amplifier 10 that outputs a constant voltage according to a reference voltage input to an inversion terminal and a non-inversion terminal, bipolar transistors Q1 and Q2 whose collectors are connected to a power supply voltage AVSS3 at a minimum potential level, resistors R1, R2, and R3 that are connected to the emitters of the bipolar transistors Q1 and Q2 and the input terminals of the operational amplifier 10, PMOS transistor MP1 and MP2 that supply a reference current to the bipolar transistors Q1 and Q2, and a start-up circuit 100 that enables the bandgap reference voltage generating circuit to set a stable operation point when the sleep mode is switched over to the operation mode or when the operation mode is switched over to the sleep mode. The bandgap reference voltage generating circuit generates a reference voltage by using a difference in the emitter-base voltage between the two bipolar transistors Q1 and Q2.
The start-up circuit 100 has three PMOS transistors MP3, MP4, and MP5, and four NMOS transistors MN1, MN2, MN3, and MN4. FIG. 2 shows the output characteristic of the related bandgap reference voltage generating circuit. Referring to FIG. 2, when the process mismatch between the input terminals of the operational amplifier 10 is 0.11% (1.1 mV) or more, a voltage required when the sleep mode is switched over to the operation mode does not rise to DC 1.0V or more and abnormally stops at 0.4V. That is, in FIG. 2, when the process mismatch between the input transistors of the operational amplifier 10 is 0%, a stable bandgap characteristic is shown (for example, an output A). Meanwhile, when the process mismatch between the input transistors of the operational amplifier 10 is 0.11% or more, an abnormal characteristic is shown (for example, an output B).
As such, in the related reference voltage generating circuit, when the mismatch between the two input transistors of the operational amplifier is 0.11% or more, the reference voltage of 0.4 V is output. For this reason, the reference voltage circuit is undesirable. In the related bandgap circuit, when the start-up circuit is in the sleep mode, the operational amplifier is put in a high state. Then, when the sleep mode is switched over to the operation mode, when the mismatch between the input transistors of the operational amplifier is beyond the tolerance or when the start-up circuit does not normally operate, the output voltage of the bandgap circuit may not be set and put in a high state.
Therefore, the related reference voltage generating circuit has a problem in that when the sleep mode is switched over to the operation mode, the operational amplifier does not have a stable operation point due to a slow operation time caused by the start-up circuit.